[1]
“A methodology for simulation of hybrid Single-electron/MOS transistor circuits”, Superficies y Vacio, vol. 26, no. 2, pp. 42–49, Jun. 2013, Accessed: Apr. 18, 2025. [Online]. Available: https://superficiesyvacio.smctsm.org.mx/index.php/SyV/article/view/167